#---------  ------------#

#1.exit modelsim simulation
quit -sim

#2.clear messages
.main clear

#3.delete the existing work dir
if [file exists work] {vdel -all}

#--------- create library and mapping ------------#
#4.creat work dir
vlib work

#5.
vmap work work

#6.complie .v files
vlog -work work ./tb_x2.v
vlog -work work ./quartus_lib/altera_mf.v
vlog -work work ./../rtl/ava_new.v
vlog -work work ./../rtl/window_3x3.v
vlog -work work ./../rtl/sobel.v
vlog -work work ./../rtl/fifo_async_varied/fifo.v


#7.start simulation
vsim -voptargs=+acc work.tb_x2

#8.add waves
	#add -divider { name }
add wave -group xx			-radix unsigned tb_x2/*
add wave -group window_3x3	-radix unsigned tb_x2/inst_window_3x3/*
add wave -group sobel		-radix unsigned tb_x2/inst_sobel/*
add wave -group ava_new		-radix unsigned tb_x2/inst_sobel/u_ava_new/*
#9.run
run 19ms
# run 17ms
# run 34ms